Professionally, this is kind of the flagship project of my thus far burgeoning career (I had been a full time Engineer for a little less than a year when this project started) It was a tough project due to an ever growing list of requirements, and the fact that nothing like this (to my knowledge) had been made before, so the process was new.

The principal electrical engineer on the project also came up with a novel method for accurately measuring delivered RF power better than most measurement schemes, but this is company internal, so I won’t mention the details. It was my responsibility to implement and verify the method worked, which I did after extensive testing and reworking. This was a kind of “throw me to the wolves” project due to the size, the functional complexity, and working on two as of yet new methods for dealing with RF measurement and calibration. But while it was tough, I came out the other end very proud of what I had built so early in my career.

Project Overview:

This project involved developing a Calibration System for an RF Electrosurgical unit.  which is an all-in-one surgical tool capable of delivering up to 1600W of RF energy across three frequencies and various modes. It can be used for everything from liposuction to delicate facial and eye procedures. Beyond RF output, the system included a high-voltage buck converter, temperature controls, vacuum pumps, RF/DC measurement circuits, and more. I’ve worked on this system and its peripherals for over three years and because of that ended up authoring much of its documentation.

Given the system's complexity and FDA requirements, extensive calibration and verification were necessary before field deployment. To streamline this, the customer requested an automated calibration tool—reducing test time from days to 15 minutes and eliminating the need for costly equipment. As the creator of the original calibration procedure, I was chosen to lead the development of this tool.

Design Goals

• Automate calibration and system checks for the RF Electrosurgery unit.

• Ensure the tool is suitable for both manufacturing and field use, allowing onsite repair and recalibration without returning to factory

Key Challenges

• Impedance Matching: Accurately replicate the load impedance of various RF cables per FDA calibration standards, enabling proper power measurement and compensation for parasitic losses.

• Precision Measurement: Include high-accuracy RF voltage, current, and temperature sensing across all frequencies and environments.

• Variable Loads: Present multiple impedances for comprehensive functional, EMI/EMC, and leakage testing, while retaining extensive functionality.

• Reliable Communication & Isolation: Maintain robust, cost-effective communication with the RF unit during high RF output, with full electrical isolation (without using fiber, too pricy!)

Workflow

The first step was identifying the complex impedance loads the system needed to replicate. Each combination of mode, waveform, frequency, and cable presented a unique load. I used a Vector Network Analyzer (VNA) to measure and document these targets, then began prototyping with custom magnetics and capacitor arrays to replicate them. These load points became the reference benchmarks throughout every stage of the project as the hardware evolved.

I handled the full system design—circuit design, simulation, part selection, and PCB layout. The design included housekeeping power circuits, a 150V boost converter, precision DC/RF voltage and current sensing, thermal measurements, isolated communication, relay control, and more. Grounding, isolation, and cabling were complex, but we pushed through to the first design revision. I also managed vendors for fabrication and assembly.

Due to the system’s complexity, we split the design across two boards—eventually needing a third. With only two official revs available, we etched the third board in-house (the yellow one in the photo) going through a number of quick redesigns, all done in house. We added basic isolation using a mock Faraday cage.

I verified all circuitry, calibrated measurements, fixed bugs, performed reworks, and validated our RF power measurement and impedance matching methods. This involved building a thermally isolated chamber, writing Python scripts for automated data collection and analysis, and documenting findings in academic-research like detail.

With the major challenges solved, I moved on to rev 2—fixing bugs, optimizing layout and components, and working closely with the mechanical team to design a portable enclosure, balancing thermal constraints and impedance requirements. Rev 2 successfully integrated all three boards, and fit them in a nice box.

After that, it was a month or two of software testing. While all the low-level functionality was handled by our embedded platform, the high-level workflow and control is handled by a software layer. It was months working with the software team, writing test procedures, state machines, testing, debugging, and verifying functionality. After that, it was off to write documentation to hand off to the customer.

Outcomes

This project took 11 and ½ months from beginning to end. It resulted in:

·         3 final PCBs, totaling over 400 sq inches of area and a BOM of 292 distinct components, not counting mechanical pieces and cables

·         3 whole systems tested, calibrated, and brought up and assembled delivered to customer

·         Full system functionality; This device reduced the time it took for a trained technician to calibrate and verify the Electrosurgery system, from 2 days to 7 minutes

·         An NDA covered method for accurately measuring RF Power in a system, of which I wrote an intra-company white paper and IEEE style research paper on (Never published, obviously)

This was also only the final prototype, not the final product. We only got 2 revs to get this complete, so I ended up writing a further list of refinements for the customer to enact once we handed it off to them.

This project was difficult, but it was a great learning experience for me. It felt to me like 5 years of experience condensed into 1. I got to design every circuit, do all the simulation, part selection, schematics, layout, bring-up, testing, re-works, calibration, data collection and analyzation for 2 revs. It was a lot of experience condensed into a small amount of time.

This is a project that seems deceptively simple at the outset, but then hammers into you that nothing is simple in Electrical Land. I got familiarity with designing for Ethernet standards, as well as got do an FPGA right on the board, which is always fun. We usually do FPGA mod boards to snap on.

It was also a particularly fun one to do schematics for and to route (If frustrating at times) because of the many signals that need length matching and impedance control to hit timing requirements. 

Project Overview:

The idea is simple: 100BaseT Ethernet comms and high amperage 24V bus coming in, and 8 ports for 10BaseT Ethernet and high amperage 24V bus going out. The board integrates into a larger system, receiving commands from a main control board from one port and give out commands through the 8 others to control motors further down the system chain. 

Since the customer couldn't find a price conscious chip that has 8 SPI peripherals, we offered to do it with an FPGA. 

The main project target goals were fairly simple. Design considerations were:

• Cost: FPGA's are very configurable and adaptable, but pricey. Everything on the board had to be cost effective enough so all of the slack could be eaten up by the FPGA

• Timing: The board had to hit some timing requirements. Timing constraints for the signals to be received and processed were tight. This was mainly a problem for the Embedded engineers, but necessitated could comms integrity design on the PCB so nothing got in their way. 

Workflow:

Our embedded team ended up doing the Ethernet MACs in the FPGA. Supporting this, I had to choose some PHY chips and design the rest of the board around those and the FPGAs. However, that meant instead of easy peasy 8 SPI ports (4 Signals) We had to route 8 RMII (9 signals)

After brushing up my understanding of Ethernet standards, I went about designing the circuits. Isolation, ESD protection, etc etc, pretty standard stuff. We found a good set of PHY chips, and after digging around in the datasheet and conferring with the embedded team, put those in as well. 

Then came the FPGA. We did This one was fun, looking up some reference design and diving into the extensive literature on Xilinx devices. Also used a nice analog circuit to manage the power up sequence required by the FPGA, low complication, no PMIC needed. The rest was just designing for power budget and heat handling capability.

Next came PCBA design. I really liked the symmetry of the PHYs, and placed the resistors so the ones I potentially needed to swap are top side and in a nice easily readable grid. Routing was more difficult. It ended up being an 8-Layer stackup to fit in all of the signals. The length matching took a while, routing everything to specific clocks and clock fanouts, not to mention the QSPI and JTAG routing, but it eventually got done. 

I had a pretty tight deadline for this board, and got it done in a record amount of time! Once it was done, of course, it sat in design review hell for weeks. I suppose that happens in bigger companies, where everyone gets a look, suggests changes they want to see, and requirements are altered. This was mostly mechanical, as they kept changing their chassis design and cabling options. 

Eventually it did get done, and manufactured pretty quickly. After boards came in, there wasn't a lot for me to test specifically except basic bring up and sanity checks, making sure it can connect and talk, and changing a few DNP resistors. The Embedded Engineers tested the comms integrity and verified that their design worked. 

Outcomes

Total outcome was successful! Timing requirements were hit, and it was sent of to the customer to be evaluated in their system. And has been there ever since! Eventually we will do a redesign to cost down and change the board footprint to the final form. Once they figure out what that form needs to be. 

This was a fairly straightforward project. Not the most exciting, but I ended up proud of what I did in such a short time. 

This project is close to my heart—I discovered the government grant, initiated contact with the department head, and kicked off R&D from the ground up. Though it began as a company project, leadership chose not to pursue it due to strategic direction. I’ve continued development independently, but progress has been slow without access to work resources or funding. So far, I’ve completed research, simulations, and designed a board I’ve yet to fabricate. I hope to invest more into it soon and move toward building real hardware.

Project Overview:

Design Goals

·         Design a scalable RF Power Generator at a specific UH Frequency that will satisfy the following criteria:

o   Efficiency: Be over 80% Efficient from plug to RF Output

o   Cost: Cost less than $3/W output

o   Scalable: Scalable to outputs of up to 100kW

Key Challenges

·         Balancing Efficiency and Cost Requirements

Workflow:

The goal was to design a UHF RF power amplifier with 85–90% efficiency. I reviewed nearly a hundred papers from top researchers in efficient PA design—Raab, Grebbenikov, Beltran, Al-Raie—searching for viable topologies. Even with finely tuned narrowband Class E and F designs, hitting 85% PAE proved ambitious. Most examples relied on costly LDMOS or GaN-on-SiC devices, driving up the price of even a 10W PA.

Still, I moved forward with a Class F design based on one of Beltran’s papers, using GaN. I initially simulated it in Keysight ADS with good results (~87% efficiency), though the original device was too expensive. I swapped in a more affordable GaN device—without an existing ADS model—so I built the model myself. While I no longer have the original sims, performance looked promising. Whether those results hold up in real life? Open question—but that’s what R&D is about.

This design featured RF tuning capacitors, custom-wound magnetics modeled with HammWaves, and Rogers substrate material. Unfortunately, the project was cut before fabrication, and I couldn’t afford to pursue it alone—both the board and necessary test equipment were out of reach. I decided to push the design forward anyway in my own time, without using anything developed with company resources. I reworked the topology to a custom Class E design with a custom scheme to boost output power from a single amplifier (details reserved for future use) and rebuilt everything in the nl5 circuit simulator.

Quick note on nl5: It is a great tool, and we use it a lot at my company. It’s fast and has a bunch of tools (Smith Charts, Fourier, Bode plots), but it only supports ideal components—no manufacturer models—so I had to create realistic models from datasheets. It’s a double-edged sword: the lack of real device models makes accurate simulation user dependent (Garbage in, Garbage out) but modeling from scratch has given me a good intuitive grasp of non-ideal device behavior—You have to if you model everything yourself!

It’s especially tough for modeling active devices at RF frequencies without load-pull equipment. I’d benefit greatly from a tool like Keysight ADS so I could do the waveform modeling and get good intrinsic device parasitic models. Still, I’m happy enough with my nl5 sims; I modeled the device parasitics and approximate gate and drain behavior using S-parameter data provided on the device datasheet. Once I have a real prototype (And test equipment) I can revise the models.

Modeling in nl5 usually starts with an ideal circuit topology and slowly expand it to include parasitics from components and PCB traces using combinations of Transmission Line (TL) models and lossy capacitances and inductances, like this one of the PA output network:

The simulation gave out pretty fair results, showing a strong ~50W at 90% efficiency. Of course, this will be way worse in real life, but it’s a good start before getting a prototype board in hand.

With the PA topology set, the next challenge—without spending money—is figuring out how to scale to 100kW. I began modeling Wilkinson combiners and radial combiners, which requires specialized PCB layout. I’m continuing simulations in nl5 and built an Excel tool to calculate parasitics and impedance of microstrip lines from physical dimensions. Since Altium is cost-prohibitive, I’m learning KiCAD for layout. The plan is to design 1.6kW PA modules, combine them into 12.8kW units via 8-way radial combiners, and ultimately bring those into a resonant cavity to hit the 100kW target. Each stage has an insertion loss, chipping away at my target 80% efficiency, but I think I have a path. The challenge is doing all this in my spare time!

Outcomes

There are no big outcomes yet. I would like to do this from the ground up, buying small pieces of the hardware for test, and work my way up. But since that isn’t possible at the moment, the project is research and simulation based. The information above is a small piece intended to show a little bit of the PA design, but I also have a large dropbox folder for all the different components of the design, including Academic Papers on PA’s and Combiners, a BOM with prospective parts and costs, a homebrew calculator for Transmission Line design/modeling (in nl5 of course) and a mind map and road map for design goals and milestones. As my resources (Both time and money!) grow I will be able to update this portfolio with more progress.